The S34ML02G100TFI000 is a Flash Non-volatile Memory offered in 3.3 VCC and VCCQ power supply and with x8 I/O interface. The memory is divided into blocks that can be erased independently so it is possible to preserve valid data while old data is erased. Each block can be programmed and erased up to 100.000 cycles with error correction code on. To extend the lifetime of NAND flash device, the implementation of an ECC is mandatory. The device has a read cache feature that improves the read throughput for large files. During cache reading, the devices load the data in a cache register while the previous data is transferred to the I/O buffers to be read. The on-chip program/erase controller automates all read, program and erase functions including pulse repetition, where required and internal verification and margining of data. A WP# pin is available to provide hardware protection against program and erase operations.

• 8-bit Input/output bus width
• Address, data and commands multiplexed NAN flash interface
• Hardware program/erase disabled during power transition
• Supports copy back program
• 100000 Program/erase cycles (typical)
• Block zero is a valid block and will be valid for at least 1000 program-erase cycles

Полупроводники - Микросхемы\Память\FLASH

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