The ADN4661BRZ is a CMOS LVDS low voltage high speed differential signalling Line Driver offering data rates of over 600Mbps (300MHz) and ultra-low power consumption. It features a flow-through pin-out for easy PCB layout and separation of input and output signals. The device accepts low voltage TTL/CMOS logic signals and converts them to a differential current output of typically ±3.1mA for driving a transmission medium such as a twisted-pair cable. The transmitted signal develops a differential voltage of typically ±355mV across a termination resistor at the receiving end and this is converted back to a TTL/CMOS logic level by a line receiver. The ADN4661 and a companion LVDS receiver offer a new solution to high speed point-to-point data transmission and a low power alternative to emitter-coupled logic (ECL) or positive emitter-coupled logic (PECL).

• Flow-through pin-out simplifies PCB layout
• 300ps Typical differential skew
• 700ps Maximum differential skew
• 1.5ns Maximum propagation delay
• 23mW Typical low power dissipation
• Interoperable with existing 5V LVDS receivers

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